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  ? 2012 microchip technology inc. ds25158a-page 1 mcp1710 features ? ultra-low 20 na (typical) quiescent current ? ultra-low shutdown supply current: 0.1 na (typical) ? 200 ma output current capability for v out <3.5v ? 100 ma output current capability for v out >3.5v ? input operating voltage range: 2.7v to 5.5v ? standard output voltages: - 1.2v, 1.8v, 2.5v, 3.3v, 4.2v ? low-dropout voltage: 450 mv maximum at 200 ma ? stable with 1.0 f ceramic output capacitor ? overcurrent protection ? space saving, 8-lead plastic 2 x 2 vdfn-8 applications ? energy harvesting ? long-life battery powered applications ? smart cards ? ultra-low consumption ?green? products ? portable electronics description the mcp1710 is a 200 ma for v out < 3.5v, 100 ma for v out > 3.5v, low dropout (ldo) linear regulator that provides high-current and low-output voltages, while maintaining an ultra-low 20 na of quiescent current during device operation. in addition, the mcp1710 can be shut down for an even lower 0.1 na (typical) supply current draw. the mcp1710 comes in five standard fixed output voltage versions: 1.2v, 1.8v, 2.5v, 3.3v and 4.2v. the 200 ma output current capability, combined with the low output-voltage capability, make the mcp1710 a good choice for new ultra-long-life ldo applications that have high current demands, but require ultra-low power consumption during sleep states. the mcp1710 is stable using ceramic output capacitors that inherently provide lower output noise and reduce the size and cost of the entire regulator solution. only 1 f (2.2 f recommended) of output capacitance is needed to stabilize the ldo. the mcp1710?s ultra-low quiescent and shutdown current allows it to be paired with other ultra-low current draw devices, such as microchip?s nanowatt xlp technology devices, for a complete ultra-low power solution. package type mcp1710 2 x 2 dfn* gnd v out gnd v in fb 1 2 3 4 8 7 6 5 gnd shdn gnd * includes exposed thermal pad (ep); see table 3-1 . ep 9 ultra-low quiescent current ldo regulator
mcp1710 ds25158a-page 2 ? 2012 microchip technology inc. typical application functional block diagram v in v out fb gnd load c in c out shdn + - v in + - shdn voltage reference overcurrent gnd shdn fb out v
? 2012 microchip technology inc. ds25158a-page 3 mcp1710 1.0 electrical characteristics absolute maximum ratings ? input voltage, v in .............................................................6.0v maximum voltage on any pin ............... (gnd ? 0.3v) to 6.0v output short circuit duration ....... ............................unlimited storage temperature .................................... -65c to +150c maximum junction temperature, t j ........................... +150c operating junction temperature, t j ...............-40c to +85c esd protection on all pins ?????????????????????????????????? ?? 2kv hbm ? notice: stresses above those listed under ?maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. exposure to maximum rating conditions for extended periods may affect device reliability. ac/dc characteristics electrical specifications: unless otherwise noted, v in =v r + 800 mv, v in(min) =v r + 0.3v, v in(max) =5.5v, note 1 , i out =1ma, c in =c out = 2.2 f (x7r ceramic), t a =+25c. boldface type applies for junction temperatures, t j ( note 4 ) of -40c to +85c parameters sym min typ max units conditions input operating voltage v in 2.7 ? 5.5 v output voltage range v out 1.2 ? 4.2 v input quiescent current i q ?20? nav in = v r + 0.8v to 5.5v, i out =0 input quiescent current for shdn mode i shdn ? 0.1 ? na shdn =gnd maximum continuous output current i out 200 ?? mav in =v r + 0.8v to 5.5v 1.2v ? v r ? 3.5v 100 ?? mav in =v r + 0.8v to 5.5v 3.5v ? v r ? 5.5v current limit i out ?250? mav out =0.9xv r 1.2v ? v r ? 3.5v ?175? mav out =0.9xv r 3.5v ? v r ? 5.5v output voltage regulation v out v r ?4% ? v r +4% vv r <1.8v ( note 2 ) v r ?2% ? v r +4% v1.8v mcp1710 ds25158a-page 4 ? 2012 microchip technology inc. dropout voltage v dropout ?? 450 mv i out = 200 ma 1.2v ? v r ? 3.5v, note 3 ?? 400 mv i out = 100ma 3.5v ? v r ? 5.5v, note 3 shutdown input logic high input v shdn-high 70 ??%v in v in = 2.7v to 5.5v logic low input v shdn-low ?? 30 %v in v in = 2.7v to 5.5v ac performance output delay from shdn t or ? 30 ? ms shdn = gnd to v in , v out = gnd to 95% v r output noise e n ?0.37?v/ ? hz i out =50ma, f=1khz, c out = 2.2 f (x7r ceramic) v out =2.5v power supply ripple rejec- tion ratio psrr ? 22 ? db f = 100 hz, i out =10ma, v inac =200mv pk-pk, c in =0f temperature specifications electrical specifications: unless otherwise noted, v in =v r +800mv, v in(min) =v r + 0.3v, v in(max) =5.5v, note 1 , i out =1ma, c in =c out = 2.2 f (x7r ceramic), t a =+25c. boldface type applies for junction temperatures, t j ( note 4 ) of -40c to +85c parameters sym min typ max units conditions temperature ranges operating junction temperature range t j -40 ? +85 c steady state maximum junction temperature t j ?? +150 c transient storage temperature range t a -65 ? +150 c thermal package resistances thermal resistance, 2x2 vdfn-8 ? ja ? 73.1 ? c/w fr4 board only 1 oz. copper jedec standard board with thermal vias ? jc ?10.7? c/w ac/dc characteristics (continued) electrical specifications: unless otherwise noted, v in =v r + 800 mv, v in(min) =v r + 0.3v, v in(max) =5.5v, note 1 , i out =1ma, c in =c out = 2.2 f (x7r ceramic), t a =+25c. boldface type applies for junction temperatures, t j ( note 4 ) of -40c to +85c parameters sym min typ max units conditions note 1: the minimum v in must meet two conditions: v in ? 2.7v and v in ?? v r ? v dropout(max). 2: v r is the nominal regulator output voltage. v r = 1.2v, 2.5v, etc. 3: dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 3% below its nominal value that was measured with an input voltage of v in =v out(max) +v dropout(max) . 4: the junction temperature is approximated by soaking the device under test at an ambient temperature equal to the desired junction temperature. the test time is small enough such that the rise in the junction temperature over the ambient temperature is not significant.
? 2012 microchip technology inc. ds25158a-page 5 mcp1710 2.0 typical performance curves note: unless otherwise indicated, c out = 2.2 f ceramic (x7r), c in = 2.2 f ceramic (x7r), i out =1ma, temperature = +25c, v in =v out + 0.8v, shdn =1m ? pullup to v in . figure 2-1: output voltage vs. input voltage (v r =1.2v). figure 2-2: output voltage vs. input voltage (v r =2.5v). figure 2-3: output voltage vs. input voltage (v r =4.2v). figure 2-4: output voltage vs. load current (v r =1.2v). figure 2-5: output voltage vs. load current (v r =2.5v). figure 2-6: output voltage vs. load current (v r =4.2v). note: the graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. the performance characteristics listed herein are not tested or guaranteed. in some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. 1.210 1.215 1.220 1.225 1.230 1.235 1.240 t put voltage (v) t j = +25c i out = 0.1 ma t j = -40c 1.195 1.200 1.205 2.5 3.0 3.5 4.0 4.5 5.0 5.5 ou t input voltage (v) t j = +85c 2.500 2.502 2.504 2.506 2.508 2.510 t put voltage (v) t j = +25c i out = 0.1 ma t j = -40c 2.494 2.496 2.498 2.5 3.0 3.5 4.0 4.5 5.0 5.5 ou t input voltage (v) t j = +85c 4.240 4.244 4.248 4.252 u tput voltage (v) t j = -40c t 85 c t j = +25c i out = 0.1 ma 4.232 4.236 4.50 4.75 5.00 5.25 5.50 o u input voltage (v) t j = + 85 c 1 180 1.185 1.190 1.195 1.200 1.205 t put voltage (v) t j = +25c t j = +85c v in = 2.5v 1.170 1.175 1 . 180 0 50 100 150 200 ou t load current (ma) t j = -40c 2.4950 2.4975 2.5000 2.5025 u tput voltage (v) t j = +25c t j = +85c v in = 3.3v t j = -40c 2.4900 2.4925 0 20406080100 o u load current (ma) 4.21 4.22 4.23 4.24 4.25 u tput voltage (v) t j = + 25c t j = +85c v in = 4.15v t j = -40c 4.19 4.20 0 20406080100 o u load current (ma)
mcp1710 ds25158a-page 6 ? 2012 microchip technology inc. note: unless otherwise indicated, c out = 2.2 f ceramic (x7r), c in = 2.2 f ceramic (x7r), i out =1ma, temperature = +25c, v in =v out + 0.8v, shdn =1m ? pullup to v in . figure 2-7: dropout voltage vs. load current (v r =2.5v). figure 2-8: dropout voltage vs. load current (v r =4.2v). figure 2-9: noise vs. frequency. figure 2-10: power supply ripple rejection vs. frequency (v r =1.2v). figure 2-11: power supply ripple rejection vs. frequency (v r =2.5v). figure 2-12: power supply ripple rejection vs. frequency (v r =4.2v). 005 0.10 0.15 0.20 0.25 0.30 o pout voltage (v) t j = +85c t j = -40c t j = +25c v out = 2.5v -0.05 0.00 0 . 05 0 20406080100 dr o load current (ma) 006 0.08 0.10 0.12 0.14 0.16 0.18 0.20 o pout voltage (v) t j = +85c t j = -40c t j = +25c v out = 4.2v 0.00 0.02 0.04 0 . 06 0 20406080100 dr o load current (ma) u t noise (v/hz) v in = 5.2v v out = 4.2v i out = 50 ma 0.1 1 10 v in = 3.5v v out = 2.5v i out = 50 ma v in = 2.8v v out = 1.8v i out = 50 ma outp u frequency (khz) 0.0 0.1 0.01 0.1 1 10 100 1000 - 60 -50 -40 -30 -20 -10 0 10 psrr (db) v in = 2.5v i out = 10 ma -100 -90 -80 -70 60 0.01 0.1 1 10 100 1000 frequency (khz) -60 -50 -40 -30 -20 -10 0 10 psrr (db) v in = 3.5v i out = 10 ma -100 -90 -80 -70 0.01 0.1 1 10 100 1000 frequency (khz) -60 -50 -40 -30 -20 -10 0 10 psrr (db) v in = 5.2v i out = 10 ma -100 -90 -80 -70 0.01 0.1 1 10 100 1000 frequency (khz)
? 2012 microchip technology inc. ds25158a-page 7 mcp1710 note: unless otherwise indicated, c out = 2.2 f ceramic (x7r), c in = 2.2 f ceramic (x7r), i out =1ma, temperature = +25c, v in =v out + 0.8v, shdn =1m ? pullup to v in . figure 2-13: dynamic load step (v r =1.2v). figure 2-14: dynamic load step (v r =2.5v). figure 2-15: dynamic load step (v r =4.2v). figure 2-16: dynamic line step (v r =1.2v). figure 2-17: dynamic line step (v r =2.5v). figure 2-18: dynamic line step (v r =4.2v). v out = 1.2v i out = 100 na to 10 ma ac1m 200 mv/div 10 ma/div v out = 2.5v i out = 100 na to 10 ma ac1m 200 mv/div 10 ma/div v out = 4.2v i out = 100 na to 10 ma ac1m 200 mv/div 10 ma/div i out = 10 ma v in = 2.5v to 3.5v 2 v/div 1 v/div v out = 1.2v i out = 10 ma v in = 3.5v to 4.5v 2 v/div 1 v/div v out = 2.5v i out = 10 ma v n = 4.5v to 5.5v 2 v/div 1 v/div v out = 4.2v
mcp1710 ds25158a-page 8 ? 2012 microchip technology inc. note: unless otherwise indicated, c out = 2.2 f ceramic (x7r), c in = 2.2 f ceramic (x7r), i out =1ma, temperature = +25c, v in =v out + 0.8v, shdn =1m ? pullup to v in . figure 2-19: startup from v in (v r =1.2v). figure 2-20: startup from v in (v r =2.5v). figure 2-21: startup from v in (v r =4.2v). figure 2-22: startup from shdn (v r =1.2v). figure 2-23: startup from shdn (v r =2.5v). figure 2-24: startup from shdn (v r =4.2v). i out = 100 na v in = 2.5v 2 v/div 2 v/div v out = 1.2v i out = 100 na v in = 3.5v 2 v/div 2 v/div v out = 2.5v i out = 100 na v in = 5.2v 2 v/div 2 v/div v out = 4.2v i out = 10 ma shdn signal 2 v/div 1 v/div v out = 1.2v i out = 10 ma shdn signal 2 v/div 1 v/div v out = 2.5v i out = 10 ma shdn signal 2 v/div 1 v/div v out = 4.2v
? 2012 microchip technology inc. ds25158a-page 9 mcp1710 note: unless otherwise indicated, c out = 2.2 f ceramic (x7r), c in = 2.2 f ceramic (x7r), i out =1ma, temperature = +25c, v in =v out + 0.8v, shdn =1m ? pullup to v in . figure 2-25: load regulation vs. junction temperature (v r =1.2v). figure 2-26: load regulation vs. junction temperature (v r =2.5v). figure 2-27: load regulation vs. junction temperature (v r =4.2v). figure 2-28: line regulation vs. junction temperature. 0.50 1.00 1.50 2.00 a d regulation (%) v in = 2.5v v in = 4.0v v 55v i out = 0 ma to 100 ma -0.50 0.00 -40-1510356085 lo a junction temperature (c) v in = 5 . 5v 020 -0.10 0.00 0.10 0.20 0.30 d regulation (%) v in = 2.8v i out = 0 ma to 100 ma v in = 4.0v -0.40 -0.30 - 0 . 20 -40 -15 10 35 60 85 loa d junction temperature (c) v in = 5.5v 0.01 0.02 0.03 0.04 0.05 d regulation (%) v in = 5.0v i out = 0 ma to 100 ma v in = 4.5v v in = 5.5v -0.01 0.00 -40-1510356085 loa d junction temperature (c) 0.30 0.35 0.40 0.45 0.50 regulation (%) i out = 1 ma v r = 2.5v v r = 1.2v 0.15 0.20 0.25 -40-1510356085 line junction temperature (c) v r = 4.2v
mcp1710 ds25158a-page 10 ? 2012 microchip technology inc. note: unless otherwise indicated, c out = 2.2 f ceramic (x7r), c in = 2.2 f ceramic (x7r), i out =1ma, temperature = +25c, v in =v out + 0.8v, shdn =1m ? pullup to v in . figure 2-29: quiescent current vs. input voltage. figure 2-30: ground current vs. junction temperature. figure 2-31: ground current vs. load current. 15 20 25 30 35 40 45 50 c ent current (na) t j = +85c t j = -40c v out = 1.2v 0 5 10 15 2.5 3 3.5 4 4.5 5 5.5 quies c input voltage (v) t j = +25c 0.65 0.70 0.75 0.80 0.85 0.90 0.95 o und current (a) v in = 2.5v v out = 1.2v i out = 0.1ma 0.50 0.55 0.60 -50 -25 0 25 50 75 100 gr o junction temperature (c) 60 80 100 120 140 160 u nd current (a) t j = +85c t j = +25c t j = -40c v in = 4.0v v out = 1.2v 0 20 40 0 20406080100 gro u load current (ma)
? 2012 microchip technology inc. ds25158a-page 11 mcp1710 3.0 pin description the descriptions of the pins are listed in tab l e 3 - 1 . 3.1 ground pin (gnd) for optimal noise and power supply rejection ratio (psrr) performance, the gnd pin of the ldo should be tied to an electrically quiet circuit ground. this will help the ldo power supply rejection ratio and noise performance. the ground pin of the ldo only conducts the ground current, so a heavy trace is not required. for applications that have switching or noisy inputs, tie the gnd pin to the return of the output capacitor. ground planes help lower the inductance and voltage spikes caused by fast transient load currents. 3.2 regulated output voltage pin (v out ) the v out pin is the regulated output voltage of the ldo. a minimum output capacitance of 1.0 f is required for ldo stability. the mcp1710 is stable with ceramic, tantalum and aluminum-electrolytic capacitors. see section 4.2 ?output capacitor? for output capacitor selection guidance. 3.3 feedback pin (fb) the output voltage is connected to the fb input. this sets the output voltage regulation value. 3.4 input voltage supply pin (v in ) connect the unregulated or regulated input voltage source to v in . if the input voltage source is located several inches away from the ldo, or the input source is a battery, it is recommended that an input capacitor be used. a typical input capacitance value of 1 f to 10 f should be sufficient for most applications (2.2 f, typical). the type of capacitor used can be ceramic, tantalum, or aluminum electrolytic. the low esr characteristics of the ceramic capacitor will yield better noise and psrr performance at high frequency. 3.5 shutdown control input (shdn ) the shdn input is used to turn the ldo output voltage on and off. when the shdn input is at a logic-high level, the ldo output voltage is enabled. when the shdn input is pulled to a logic-low level, the ldo output voltage is disabled. when the shdn input is pulled low, the ldo enters a low-quiescent current shutdown state, where the typical quiescent current is 0.1 na. 3.6 exposed pad pin (ep) the vdfn-8 package has an exposed metal pad on the bottom of the package. the exposed metal pad gives the device better thermal characteristics by providing a good thermal path to either the pcb or heat sink, to remove heat from the device. the exposed pad of the package is at ground potential. table 3-1: pin function table mcp1710 vdfn name description 1, 3, 4, 5, gnd ground 2v out regulated output voltage 6 fb output voltage feedback input 7v in input voltage supply 8 shdn shutdown control input (active-low) 9ep exposed pad, connected to gnd.
mcp1710 ds25158a-page 12 ? 2012 microchip technology inc. notes:
? 2012 microchip technology inc. ds25158a-page 13 mcp1710 4.0 device overview the mcp1710 is a 100 ma/200 ma output current, low dropout (ldo) voltage regulator. the low dropout voltage of 450 mv maximum at 200 ma of current makes it ideal for battery-powered applications. the input voltage range is 2.7v to 5.5v. the mcp1710 adds a shutdown-control input pin. the mcp1710 is available in five standard fixed-output voltage options: 1.2v, 1.8v, 2.5v, 3.3v and 4.2v. the mcp1710 uses a proprietary voltage reference and sensing scheme to maintain the ultra-low 20 na quiescent current. 4.1 output current and current limiting the mcp1710 ldo is tested and ensured to supply a minimum of 200 ma of output current for the 1.2v to 3.5v output range, and 100 ma of output current for the 3.5v to 4.2v output range. the mcp1710 has no mini- mum output load, so the output load current can go to 0 ma and the ldo will continue to regulate the output voltage within the specified tolerance. the mcp1710 also incorporates an output current limit. the current limit is set to 250 ma typical for the 1.2v ? v r ? 3.5v range, and 175 ma typical for the 3.5v ? v r ? 5.5v range. 4.2 output capacitor the mcp1710 requires a minimum output capacitance of 1 f for output voltage stability. ceramic capacitors are recommended because of their size, cost and robust environmental qualities. aluminum-electrolytic and tantalum capacitors can be used on the ldo output as well. the output capacitor should be located as close to the ldo output as is practical. ceramic materials x7r and x5r have low temperature coefficients and are well within the acceptable esr range required. a typical 1 f x7r 0805 capacitor has an esr of 50 m ? . 4.3 input capacitor low input-source impedance is necessary for the ldo output to operate properly. when operating from batteries, or in applications with long lead length (> 10 inches) between the input source and the ldo, some input capacitance is recommended. a minimum of 1.0 f to 4.7 f is recommended for most applications. for applications that have output step load requirements, the input capacitance of the ldo is very important. the input capacitance provides the ldo with a good local low-impedance source to pull the transient currents from. this will allow the ldo to respond quickly to the output load step. for good step- response performance, the input capacitor should be of equivalent or higher value than the output capacitor. the capacitor should be placed as close to the input of the ldo as is practical. larger input capacitors will also help reduce any high-frequency noise on the input and output of the ldo, and reduce the effects of any inductance that exists between the input source voltage and the input capacitance of the ldo. 4.4 shutdown input (shdn ) the shdn input is an active-low input signal that turns the ldo on and off. the shdn threshold is a percentage of the input voltage. the maximum input- low logic level is 30% of v in and the minimum high logic level is 70% of v in . on the rising edge of the shdn input, the shutdown circuitry has a 30 ms (typical) delay before allowing the ldo output to turn on. this delay helps to reject any false turn-on signal or noise on the shdn input signal. after the 30 ms delay, the ldo output enters its current limited soft-start period as it rises from 0v to its final regulation value. if the shdn input signal is pulled low during the 30 ms delay period, the timer will be reset and the delay time will start over again on the next ris- ing edge of the shdn input. the total time from the shdn input going high (turn-on) to the ldo output being in regulation is typically 30 ms. see figure 4-1 for a timing diagram of the shdn input. figure 4-1: shutdown input timing diagram. shdn v out 30 ms 10 s t or 20 ns (typical)
mcp1710 ds25158a-page 14 ? 2012 microchip technology inc. 4.5 dropout voltage dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 3% below the nominal value that was measured with a v r + 0.8v differential applied. the mcp1710 ldo has a low-dropout voltage specification of 450 mv for the 1.2v ? v r ? 3.5v range (typical) at 200 ma out, and 400mv for the 3.5v ? v r ?? 5.5v range (typical) at 100 ma out. see section 1.0 ?electrical characteristics? for maximum dropout voltage specifications.
? 2012 microchip technology inc. ds25158a-page 15 mcp1710 5.0 application circuits/issues 5.1 typical application the mcp1710 is used for applications that require ultra-low quiescent current draw. figure 5-1: typical application circuit. 5.2 power calculations 5.2.1 power dissipation the internal power dissipation within the mcp1710 is a function of input voltage, output voltage, output current and quiescent current. equation 5-1 can be used to calculate the internal power dissipation for the ldo. equation 5-1: in addition to the ldo pass element power dissipation, there is power dissipation within the mcp1710 as a result of quiescent or ground current. the power dissipation as a result of the ground current can be calculated using equation 5-2 : equation 5-2: the total power dissipated within the mcp1710 is the sum of the power dissipated in the ldo pass device and the p(i gnd ) term. because of the cmos construction, the typical i gnd for the mcp1710 is 200 a at full load. operating at a maximum v in of 5.5v results in a power dissipation of 1.1 mw. for most applications, this is small compared to the ldo pass device power dissipation, and can be neglected. the maximum continuous operating junction temperature specified for the mcp1710 is +85c . to estimate the internal junction temperature of the mcp1710, the total internal power dissipation is multiplied by the thermal resistance from junction-to- ambient (r ? ja ) of the device. the thermal resistance from junction-to-ambient for the 2 x 2 vdfn-8 package is estimated at 73.1c/w. equation 5-3: the maximum power dissipation capability for a package can be calculated given the junction-to- ambient thermal resistance and the maximum ambient temperature for the application. equation 5-4 can be used to determine the package maximum internal power dissipation. equation 5-4: v in v out fb gnd load c in c out shdn + - p ldo v in max ?? v out min ?? ? ?? i out max ?? ? = where: p ldo = ldo pass device internal power dissipation v in(max) = maximum input voltage v out(min) = ldo minimum output voltage i out(max) = maximum output current p ignd ?? v in max ?? i gnd ? = where: p i(gnd) = power dissipation due to the quiescent current of the ldo v in(max) = maximum input voltage i gnd = current flowing in the gnd pin t jmax ?? p total r ? ja ? t amax ?? + = where: t j(max) = maximum continuous junction temperature p total = total device power dissipation r ? ja = thermal resistance from junction to ambient t amax = maximum ambient temperature p dmax ?? t jmax ?? t amax ?? ? ?? r ? ja --------------------------------------------------- = where: p d(max) = maximum device power dissipation t j(max) = maximum continuous junction temperature t a(max) = maximum ambient temperature r ? ja = thermal resistance from junction-to-ambient
mcp1710 ds25158a-page 16 ? 2012 microchip technology inc. equation 5-5: equation 5-6: 5.3 typical application examples internal power dissipation, junction temperature rise, junction temperature and maximum power dissipation are calculated in the following example. the power dis- sipation as a result of ground current is small enough to be neglected. 5.3.1 power dissipation example example 5-1: 5.3.1.1 device junction temperature rise the internal junction temperature rise is a function of internal power dissipation and the thermal resistance from junction-to-ambient for the application. the thermal resistance from junction-to-ambient (r ? ja ) is derived from eia/jedec standards for measuring thermal resistance. the eia/jedec specification is jesd51. the standard describes the test method and board specifications for measuring the thermal resistance from junction-to-ambient. the actual thermal resistance for a particular application can vary depending on many factors such as copper area and thickness. refer to an792, ?a method to determine how much power a sot-23 can dissipate in an application? (ds00792), for more information regarding this subject. example 5-2: 5.3.1.2 junction temperature estimate to estimate the internal junction temperature, the calculated temperature rise is added to the ambient or offset temperature. for this example, the worst-case junction temperature is estimated below: example 5-3: 5.3.1.3 maximum package power dissipation at +60c ambient temperature example 5-4: package package type = 2 x 2 vdfn-8 input voltage v in =3.3v5% ldo output voltage and current v out =2.5v i out =200ma maximum ambient temperature t a(max) =+60c internal power dissipation p ldo(max) =(v in(max) ? v out(min) )xi out(max) p ldo = ((3.3v x 1.05) ? (2.5v x 0.975)) x200ma p ldo = 0.206 watts t jrise ?? p dmax ?? r ? ja ? = t j(rise) = rise in device junction temperature over the ambient temperature p d(max) = maximum device power dissipation r ? ja = thermal resistance from junction-to- ambient t j t jrise ?? t a + = t j = junction temperature t j(rise) = rise in device junction temperature over the ambient temperature t a = ambient temperature t j(rise) =p total xr ? ja t jrise = 0.206w x 73.1c/w t jrise =15.1c t j =t jrise +t a(max) t j = 15.1c + 60.0c t j =75.1c 2x2 dfn-8 (73.1c/w r ? ja ): p d(max) = (85c ? 60c)/73.1c/w p d(max) = 0.342w
? 2012 microchip technology inc. ds25158a-page 17 mcp1710 6.0 packaging information 6.1 package marking information legend: xx...x customer-specific information y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week ?01?) nnn alphanumeric traceability code pb-free jedec designator for matte tin (sn) * this package is pb-free. the pb-free jedec designator ( ) can be found on the outer packaging for this package. note : in the event the full microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 3 e 3 e 8-lead vdfn (2 x 2 x 0.9) example: part number code mcp1710t-12i/lz aaa mcp1710t-18i/lz aab mcp1710t-25i/lz aac mcp1710t-33i/lz aad mcp1710t-42i/lz aae aaa 256
mcp1710 ds25158a-page 18 ? 2012 microchip technology inc.
? 2012 microchip technology inc. ds25158a-page 19 mcp1710
mcp1710 ds25158a-page 20 ? 2012 microchip technology inc.
? 2012 microchip technology inc. ds25158a-page 21 mcp1710 appendix a: revision history revision a (september 2012) ? original release of this document.
mcp1710 ds25158a-page 22 ? 2012 microchip technology inc. notes:
? 2012 microchip technology inc. ds25158a-page 23 mcp1710 product identification system to order or obtain information, e. g., on pricing or delivery, refer to the factory or the listed sales office . device: mcp1710t: 200 ma low dropout regulator tape and reel output voltage*: 12 = 1.2v ?standard? 18 = 1.8v ?standard? 25 = 2.5v ?standard? 33 = 3.3v ?standard? 42 = 4.2v ?standard? *contact factory for other output voltage options temperature: i= -40 ? c to +85 ? c (industrial) package type: lz = very thin dual flatpack, no lead (vdfn), 8-lead part no. - xx output device voltage x/ temp. xx package examples: a) mcp1710t-12i/lz: tape and reel, 1.2v output voltage, industrial temp., 8-ld vdfn package b) mcp1710t-18i/lz: tape and reel, 1.8v output voltage, industrial temp., 8-ld vdfn package c) mcp1710t-25i/lz: tape and reel, 2.5v output voltage, industrial temp., 8-ld vdfn package d) mcp1710t-33i/lz: tape and reel, 3.3v output voltage, industrial temp., 8-ld vdfn package e) mcp1710t-42i/lz: tape and reel, 4.2v output voltage, industrial temp., 8-ld vdfn package t tape and reel
mcp1710 ds25158a-page 24 ? 2012 microchip technology inc. notes:
? 2012 microchip technology inc. ds25158a-page 25 information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. it is your responsibility to ensure that your application meets with your specifications. microchip makes no representations or warranties of any kind whether express or implied, written or oral, statutory or otherwise, related to the information, including but not limited to its condition, quality, performance, merchantability or fitness for purpose . microchip disclaims all liability arising from this information and its use. use of microchip devices in life support and/or safety applications is entirely at the buyer?s risk, and the buyer agrees to defend, indemnify and hold harmless microchip from any and all damages, claims, suits, or expenses resulting from such use. no licenses are conveyed, implicitly or otherwise, under any microchip intellectual property rights. trademarks the microchip name and logo, the microchip logo, dspic, flashflex, k ee l oq , k ee l oq logo, mplab, pic, picmicro, picstart, pic 32 logo, rfpic, sst, sst logo, superflash and uni/o are registered trademarks of microchip technology incorporated in the u.s.a. and other countries. filterlab, hampshire, hi-tech c, linear active thermistor, mtp, seeval and the embedded control solutions company are registered trademarks of microchip technology incorporated in the u.s.a. silicon storage technology is a registered trademark of microchip technology inc. in other countries. analog-for-the-digital age, app lication maestro, bodycom, chipkit, chipkit logo, codeguard, dspicdem, dspicdem.net, dspicworks, dsspeak, ecan, economonitor, fansense, hi-tide, in-circuit serial programming, icsp, mindi, miwi, mpasm, mpf, mplab certified logo, mplib, mplink, mtouch, omniscient code generation, picc, picc-18, picdem, picdem.net, pickit, pictail, real ice, rflab, select mode, sqi, serial quad i/o, total endurance, tsharc, uniwindriver, wiperlock, zena and z-scale are trademarks of microchip technology incorporated in the u.s.a. and other countries. sqtp is a service mark of microchip technology incorporated in the u.s.a. gestic and ulpp are registered trademarks of microchip technology germany ii gmbh & co. & kg, a subsidiary of microchip technology inc., in other countries. all other trademarks mentioned herein are property of their respective companies. ? 2012, microchip technology incorporated, printed in the u.s.a., all rights reserved. printed on recycled paper. isbn: 978-1-62076-575-3 note the following details of the code protection feature on microchip devices: ? microchip products meet the specification cont ained in their particular microchip data sheet. ? microchip believes that its family of products is one of the most secure families of its kind on the market today, when used i n the intended manner and under normal conditions. ? there are dishonest and possibly illegal methods used to breach the code protection feature. all of these methods, to our knowledge, require using the microchip produc ts in a manner outside the operating specif ications contained in microchip?s data sheets. most likely, the person doing so is engaged in theft of intellectual property. ? microchip is willing to work with the customer who is concerned about the integrity of their code. ? neither microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as ?unbreakable.? code protection is constantly evolving. we at microchip are co mmitted to continuously improvin g the code protection features of our products. attempts to break microchip?s code protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona; gresham, oregon and design centers in california and india. the company?s quality system processes and procedures are for its pic ? mcus and dspic ? dscs, k ee l oq ? code hopping devices, serial eeproms, microperipherals, nonvolatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001:2000 certified. quality management s ystem certified by dnv == iso/ts 16949 ==
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